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Maidenhead, UK - 30 January, 2003 - Fujitsu Microelectronics Europe (FME) today announces the MB86064 Dual 14-bit 800MSa/s Digital to Analogue Converter (DAC). This is the first Application Specific Standard Product (ASSP) based on its Next Generation DAC technology.

Until today Fujitsu has been providing customers with early access to the Next Generation DAC technology through Mixed Signal ASIC (MS-ASIC) solutions. The move to provide an ASSP solution will enable applications where a custom approach is either not required or not justified.

“This ASSP is integral to the roll-out of our latest DAC technology, opening up more opportunities and markets. The price/performance point achieved enables the cost-effective realisation of high direct-IF multi-carrier systems for GSM, W-CDMA and UMTS,” said Neil Amos, Director of FME’s Mixed Signal Division.

As well as radically improved performance from innovative circuit designs, the product boasts a host of features ranging from the on-chip vector memories, which enhance system integration and test, to next generation Segment Shuffling which further improves dynamic performance. The vector memories enable waveforms to be downloaded and executed on-chip. For device test & evaluation this alleviates the need for a high speed data generator, while in a final system application they are ideal for implementing tests on the subsequent analogue signal chain.

Analogue performance at high output frequencies is enhanced by novel current switch and switch driver designs which provide constant data-independent switching delay, reducing jitter and distortion. The leap in performance provided by this DAC will be instrumental in enabling new architectures to reduce the costs of existing cellular infrastructure systems while simultaneously addressing future needs. In four-carrier W-CDMA applications ACPR of 70dBc can be achieved with direct-IF generation at 300MHz, with even higher performance at lower output frequencies.

“This development reflects our position as the leader in high-speed DAC technology”, emphasised Ian Dedic, Chief Engineer at FME’s Mixed Signal Division. “We have already been granted eight US patents protecting the jitter reduction techniques and other innovations used in the MB86064, and have further patent applications pending both in the US and other countries”.

Direct-IF architectures can now demonstrate cost competitiveness to more traditional direct modulation architectures, while avoiding their inherent drawbacks. Bandwidths up to 100MHz can now be generated directly at these high IFs, sufficient to implement the entire UMTS band with digital pre-distortion.

The Segment Shuffling is a major enhancement over techniques introduced in the MB86060 & MB86061 DAC ASSPs. This improves performance to the level sought after for next generation systems and high direct-IF architectures by moving distortion products out-of-band and reducing device-to-device variation.

“The MB86064 provides an unrivalled solution to the problem of generating wider transmit bandwidths in cellular base stations”, highlighted Paul Maddox, Technical Marketing Manager at FME’s Mixed Signal Division.

Implemented in Fujitsu’s advanced mixed signal CS80A 0.18µm CMOS process, the dual DAC core combined with LVDS data inputs and a versatile serial control port provides a complete high performance DAC solution. Generating and driving the data for such a DAC has traditionally been restricted to expensive ECL-based technology.

However, the provision of a LVDS interface combined with the advance in data generating capabilities of ASSPs, ASICs and FPGAs enables cost effective, realisable solutions. In particular, clock-to-data timing across the data interface can be guaranteed by using FPGAs with Phase Locked Loop (PLL) or Delay-Locked Loop (DLL) clock generators and external reference clock loop-back.

The provision of a dual DAC has particular benefit to cellular infrastructure applications, for example either transmit with diversity or combined dual transmit configurations. Other application areas are expected to include test equipment and video/display systems.

The MB86064 is housed in Fujitsu’s enhanced fine-pitch ball grid array (EFBGA) package. The EFBGA range has been developed specifically to meet the needs of high performance mixed signal devices. Benefits include optimised signal routing within the package, easier PCB tracking and excellent thermal properties assisted by a thermal ball array directly under the device. Using the 120-ball variant, the package measures 12mm x 12mm.

Customer development kits and sample devices are available today. Mass Production (MP) is scheduled for 3Q CY2003.



ISSUED ON BEHALF OF:

Fujitsu Microelectronics Europe

Am Siebenstein 6-10

D-63303 Dreieich-Buchschlag

Germany

Tel: +49-6103-6900

Fax: +49-6103-690122

Email: jim.bryant@fujitsu.com

Contacts: Jim Bryant


MORE INFORMATION:

JDK Marketing Communications

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TN16 1SL

Tel: 01959 562772

Fax: 01959 564848

Email: claire@jdk.co.uk
Contacts: Frank Cornell

A medium resolution picture relevant to this press release can be found by following the link:

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For a high resolution download option please follow the link:

http://ftp.jdk.co.uk/Fujitsu/Press/HRPR772.zip

Further information on Fujitsu Microelectronics Europe’s products is available on our WWW address at:

http://www.fme.fujitsu.com

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