Frankfurt, November 7th 2003. Fujitsu has announced the development of an ARM9 multi-CPU evaluation device, the MB87Q1100, which implements the next-generation SoC (System-on-Chip) platform, integrating ARM926EJ-S and ARM946E-S embedded macrocell cores.
It is becoming increasingly difficult to develop large scale integration chips from scratch. This evaluation device is designed to improve efficiency, shorten customer’s development times and enable more complete final chip solutions.
The implementation of this next-generation SoC platform, which adopts multi-CPU capabilities and the multi-layer Advanced High-performance Bus (AHB), improves throughput conventionally and reduces power consumption significantly.
The external extension function of AHB-Lite, a sub-set of the AHB system bus, is incorporated. This makes it possible for customers to design and verify modules in their ASIC by connecting the master and slave module of AHB-Lite to the device.
A T-Engine, open, real-time, standard networking development platform board carrying this device is due to be displayed at the ET2003 show in Japan. Fujitsu expects to deliver this T-Engine board as a development environment for various SoCs for embedded applications at the end of 2003.
Key features of MB87Q1100:
* 0.11µm CMOS process
* FBGA400 (15 x 15mm)
* Multi-CPU (ARM926EJ-S/ARM946E-S)
* Multi-layer AHB
* Maximum frequency of operation: CPU 200MHz; AHB 100MHz; APB 50MHz
* Power consumption: 450mW (typ., 200MHz CPU operation)
* ARM926EJ-S, ARM946E-S: Cache size 16kB/16kB. TCM size 64kB/32kB
* Built-in peripherals:
- Flash and SDRAM memory controller
- Eight-channel DMA (Direct Memory Access) controller
- Power-saving mechanism (a clock gear function, standby mode)
- Interrupt controller
- 2 channel UART
- 2 x 2 channel timer
ARM is the registered trademark of ARM Limited in the UK and USA.
ISSUED ON BEHALF OF:
Fujitsu Microelectronics Europe
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