• XJTAG Development System enhanced to give circuit developers faster access and greater control over JTAG chain – JTAG chain can now be run at up to 50MHz
• New features extend test coverage and number of BSDL files supported; support for the Protel® netlist format also added
• XJTAG launches XJRunner – a cut down version of the XJTAG system is introduced for use at production sites or by contract manufacturing partners.
CAMBRIDGE, England, June 8, 2004 – XJTAG Limited (www.xjtag.com), a specialist design and test tool developer and part of the Cambridge Technology Group, has announced a raft of extra features for its XJTAG boundary scan Development System, designed to cut the cost and shorten the development cycle of electronic products.
The enhanced version of the XJTAG Development System, which can test JTAG as well as non JTAG devices, gives circuit developers faster access to and greater control over the JTAG chain, which can now run at up to 50MHz. Improvements to XJEase and XJAnalyser have made code even easier to develop and initial start up even quicker. In addition, XJTAG supports a wider range of BSDL (boundary scan description language) files, offers a growing database of reusable test scripts, and now also supports the Protel® netlists parser.
XJTAG can test a high proportion of the circuit including BGA (ball grid array) and chip scale devices, SDRAMs, Ethernet controllers, video interfaces, flash memories, FPGAs (Field Programmable Gate Arrays), microprocessors and many other devices. XJTAG also enables In-System Programming of FPGAs, CPLDs (Complex Programmable Logic Devices) and flash memories. Test coverage has been further extended with the new version of XJTAG to include more extensive testing for short circuits.
To enable the test systems developed by design engineers to be taken seamlessly forward to production testing and through into field support and repair, XJTAG has developed XJRunner, a cut down version of XJTAG that can be supplied to a production facility, a contract manufacturing partner or to field support engineers. XJRunner offers a cost effective way of extending the power of XJTAG - minus the development capability - throughout the product lifecycle.
“Board developers are choosing the XJTAG system due to its competitive price and the reusability and portability of test scripts which enables printed circuits to be tested and debugged in days as opposed to weeks with many other comparable boundary scan systems,” said Dominic Plunkett, chief technology officer, XJTAG Limited. “These new features and the launch of XJRunner will ensure that we maintain our market leading position and continue to grow our customer base.”
The powerful and easy-to-use XJTAG Development System, launched in 2003, provides a fully-integrated environment which can migrate seamlessly through the product life cycle from early design to field support and repair. XJTAG enables circuit designers to shorten the development cycle and prototyping process by facilitating early test development, early design validation of CAD netlists, fast generation of highly functional tests and test re-use across circuits that utilise the same devices.
XJTAG test scripts are also re-usable and portable across different boards due to the novel device-centric approach that the designers have adopted. Re-usable device tests and the abstraction of device tests from both circuit detail and complexity of JTAG (Joint Test Action Group), mean that designers can quickly develop systems to debug elements of their designs and to functionally test early prototypes. The test systems developed can then be taken forward seamlessly to production testing and through into field support and repair.
The XJTAG Development System includes – XJAnalyser, XJEase, XJRunner, XJLink and XJDemo.
XJAnalyser is a powerful tool for circuit visualisation that provides a simple graphical view of the state of all JTAG pins. Its ‘plug and play’ configuration provides instant JTAG chain verification and allows a developer to interact with the circuit and view and set the values of pins or buses on devices in the JTAG chain. It also identifies the correct BSDL files from its library ahead of running tests.
XJEase is the high-level, BASIC-like test description language for manipulating non-JTAG devices. Unlike other JTAG tools it is device rather than board-centric. This enables circuit developers to re-use XJEase scripts in different projects. XJEase also allows the use of loops, jumps and variables to adapt test sequences to the current state of the circuit.
XJLink is a USB 2.0 hardware module used to connect the computer with the unit under test and supports multiple JTAG chains. Finally, XJDemo is a fully populated demonstrator board with tutorial designed to provide the developer with a rapid understanding of the XJTAG system and how to simulate faults.
For more information about the XJTAG Development System, please contact XJTAG Limited, The Irwin Centre, Scotland Road, Dry Drayton, Cambridge CB3 8AR, U.K. Telephone +44 (0) 1954 213888, facsimile +44 (0) 1954 211565 or email firstname.lastname@example.org. Alternatively visit www.xjtag.com.
About XJTAG (www.xjtag.com)
XJTAG Limited is a specialist design and test tool developer. Its JTAG (Joint Test Action Group) development system offers a competitive solution for designers and developers of electronic circuits. Utilising XJTAG allows circuit development and prototyping process to be shortened significantly by facilitating early test development, early design validation, fast development of functional tests and test re-use across circuits that utilise the same devices. The company is based in the U.K. at The Irwin Centre, Dry Drayton, Cambridge, U.K.
About the Cambridge Technology Group (www.cambridgetechgroup.com)
Cambridge Technology Group is a holding company with three wholly owned subsidiaries - Adiabatic Logic Limited, Cambridge Technology Consultants Limited and XJTAG Limited. Adiabatic Logic (www.adiabaticlogic.com) was set up to exploit a portfolio of secured patents in the low power technology arena. Adiabatic Logic’s patented Intelligent Output Driver (IOD), launched in May 2003, delivers significant (up to 75%) power savings in chip I/O for portable devices such as laptop computers, personal digital assistants (PDAs), MP3 players and smartphones.
Cambridge Technology Consultants (www.camtechconsultants.com) offers its clients – companies such as ARM, AT&T, BOC Edwards, Celoxica, Co-operative Group, Fujitsu, Marconi, Mitsubishi Electric and IPWireless – a broad range of services from high-end applications to innovative product development and technical consultancy skills. For ten years, its multi disciplinary team of hardware and software engineers have provided cost-effective solutions from concept through to pre-production.
What is JTAG?
Advances in silicon design, such as increasing device density and, more recently, ball grid array (BGA) and chip scale packaging, have reduced the efficacy of traditional electronic circuit testing methods. In order to overcome these problems and others; some of the world’s leading silicon manufacturers combined to form the Joint Test Action Group (JTAG). The findings of this group were used as the basis for the Institute of Electrical and Electronic Engineers (IEEE) standard 1149.1: Standard Test Access Port and Boundary Scan Architecture and subsequently the standard became known as JTAG.
Media contact (for XJTAG datasheets and/or photography):
Martin Brooke Associates
Tel: +44 (0) 1223 264050
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