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November 21st 2000. Fujitsu Microelectronics Europe has announced the new CS/CE90 ASIC series utilising the industry first 0.11micron ASIC process technology developed by the company.

Fujitsu's new technology features the lowest power, fastest transistors and most compact memory cells known in the industry. It includes shallow trench isolation techniques, chemical-mechanical polishing for all planarisation and CoSi2 in transistor gate and source/drain. The new, all-layer copper-interconnect process uses five to eight levels of copper wiring and low-K dielectric techniques to provide low power and high speed.

The initial products developed to utilise this very deep submicron technology will support as many as 56 million gates per chip. The core operating voltage is from 0.85V to 1.65V with analogue and I/O blocks available in 2.5V and 3.3V. The junction operates in the temperature range -40 degrees Centigrade to 125 degrees Centigrade and densities are double that of Fujitsu's 0.18 micron technology.

Presently under development, and mass production planned for Q3FY2001, the new devices to feature this new technology have a small SRAM cell and, with the special CS90DLS, both FCRAM and SDRAM will be available.

With a power requirement of 2nW/MHz/gate at 1.2V, and the industry's smallest memory cells measuring just 2 micron2 for the 6 transistor SRAM, and 0.2 micron2 for the embedded DRAM, this new technology enhances Fujitsu's world-leading position.

The CS90A will utilise the new process technology and all copper wiring technique, which compared with the aluminium previously used gives a wire delay and power of 1.00/1.00 as opposed to 1.35/1.30.

The CS91/CE91 will be based on the CS90A CMOS technology and the first devices to use the new technology, with a gate length of 0.11 micron and 5-8 layer of metal installed. The CS91 high density, low power standard cell, and the CE91 quick Turn around Time embedded array ASIC series are designed for high density, high pin count LSI and portable system LSI applications.

The devices will feature high performance analogue elements including ADC, DAC and op amps, in addition to memory compilers for single and dual port SRAM, ROM and register files.

The initial design library will be available by the end of Q4FY2000, with basic gates and initial I/O options, which include some memory blocks and mixed signal macros.

The entire library release is due by Q3FY2001, and this will contain the high performance/speed CS91A gates, memory compilers, a variety of high speed I/O interfaces (including T-LVTTL, P-CML, LVDS, SSTL, HSTL) and special purpose I/O's (PCI, USB, AGP). There will also be Multi-Gbit interfaces including SONET and10G Ethernet. The devices will be packaged within flip-chip BGA's.

The new technology is particularly useful for both networking and multimedia applications, as end users can now benefit from the high speed and densities available from the new ASIC series and technology.


ISSUED ON BEHALF OF:

Fujitsu Microelectronics Europe

Am Siebenstein 6-10

D-63303 Dreieich-Buchschlag

Germany

Tel: +49-6103-690257

Fax: +49-6103-690122

E-mail: ines.polak@fujitsu-fme.com


Contacts: Ines Polak


MORE INFORMATION FROM:

JDK Marketing Communications

The Old Granary

Squerryes

Goodley Stock Road

Westerham, Kent TN16 1SL

Tel: 01959 562772

Fax: 01959 562800

E-mail: sarah@jdk.co.uk

oanna Muggeridge

This product information is also available on the WWW at:

http://www.fujitsu-fme.com/news/press/start.php3


Further information on Fujitsu Microelectronics Europe’s products is available on
our WWW address at: http://www.fujitsu-fme.com

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